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Version 11 (Dmitry Smekhov, 09/12/2015 10:39 pm)

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h1. DS_DMA
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h2. Objective







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 Development PCI Express IP Core for  Virtex 5, Virtex 6, Spartan 6, Artix 7 FPGA.







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[[ds-dma:|Russian version]]







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h2. Main features







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* PCI Express 1.1 x1,x4,x8 or 2.0 x4







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* two address space: BAR0, BAR1







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* access to registers can only be single 32-bit instructions







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* local bus: 64 bit, 250 MHz







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* two independent bidirectional DMA channel







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* DMA channel only works in the SCATTER-GATHER mode







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* The minimum unit of data for channel DMA - 4 kB







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* Descriptors combined into the block descriptors. The maximum number of descriptors in the block - 63







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* DMA channel uses 40 bit addresses







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"PCIe_DS_DMA":http://opencores.org/project,pcie_ds_dma is mirror on the opencores.org







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h2. Description







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* [[Struct]] 







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* [[The control registers]]







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* [[Algorithms for main operations]]







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h2. IP Core







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* [[pcie_core64_m1_en|pcie_core64_m1]] - PCI Express v1.1 x8, Virtex 5, local bus 64 bit







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* [[pcie_core64_m4_en|pcie_core64_m4]] - PCI Express v2.0 x4, Virtex 6, local bus 64 bit







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* [[pcie_core64_m6_en|pcie_core64_m6]] - PCI Express v1.1 x1, Spartan 6, local bus 64 bit







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* [[pcie_core64_m10_en|pcie_core64_m10]] - PCI Express v2.0 x4, Artix 7, local bus 64 bit







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h2. Project







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h3. ADM 







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* [[ambpex5_v20_sx50t_core_en|ambpex5_v20_sx50t_core]] - pcie_core64_m1 on AMBPEX5 (Virtex 5)







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* [[ml605_lx240t_core_en|ml605_lx240t_core]] - pcie_core64_m4 on ML605 (Virtex 6)







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* [[sp605_lx45t_core_en|sp605_lx45t_core]] - pcie_core64_m6 on SP605 (Spartan 6)







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* [[ac701_a200t_core_en|ac701_a200t_core]] - pcie_core64_m10 on AC701 (Artix 7)







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h3. Wishbone







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* [[sp605_lx45t_wishbone_en|sp605_lx45t_wishbone]] - pcie_core64_m6 on SP605 (Spartan 6) - PCI Express v1.1 x1







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* [[ambpex5_sx50t_wishbone]] - pcie_core64_m1 on AMBPEX5 (Virtex 5) - PCI Express v1.1 x8







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h2. Software







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* [[Linux_en|Linux]]







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* [[Windows_en|Windows]]







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h2. The speed of data transfer







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* [[ambpex5_v20_sx50t_core_res_en|ambpex5_v20_sx50t_core]] 







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* [[ml605_lx240t_core_res_en|ml605_lx240t_core]] 







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* [[sp605_lx45t_core_res_en|sp605_lx45t_core]] 







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h2. Access to source code







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Access to the source code on the opencores.org:







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http://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk







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You need to register on the opencores.org







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Repository: http://ds-dev.ru/projects/ds-dma/repository







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Web SVN vie opencores: http://opencores.org/websvn,listing,pcie_ds_dma







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Old repository: http://svn.1gb.ru/ds-dma







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login: guest







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password: guest







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h2. Access to automated documentation







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* *ambpex5_v20_sx50t_core*  - http://src.ds-dev.ru/projects/ds_dma/ambpex5_v20_sx50t_core/classambpex5__v20__sx50t__core.html 







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* *pcie_core64_m1*     - http://src.ds-dev.ru/projects/ds_dma/core/classpcie__core64__m2.html  







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h2. Additionally







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* [[FAQ_en|FAQ]]







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* [[Download]]







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* [[Publications]]







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* [[Links]]







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* [[The structure of the repository]]







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* [[Authors]]