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Dmitry Smekhov, 02/24/2012 11:52 pm


DS_DMA

Objective

Development PCI Express IP Core for  Virtex 5, Virtex 6, Spartan 6 FPGA.

Russian version

Main features

  • PCI Express 1.1 x1,x4,x8 or 2.0 x4
  • two address space: BAR0, BAR1
  • access to registers can only be single 32-bit instructions
  • local bus: 64 bit, 266 MHz
  • two independent bidirectional DMA channel
  • DMA channel only works in the SCATTER-GATHER mode
  • The minimum unit of data for channel DMA - 4 kB
  • Descriptors combined into the block descriptors. The maximum number of descriptors in the block - 63
  • DMA channel uses 40 bit addresses

Description

IP Core

Project

ADM

Wishbone

Software

The speed of data transfer

Access to source code

Access to the source code is available via Subversion: http://svn.1gb.ru/ds-dma
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Access to automated documentation

Additionally