Ambpex5 sx50t wishbone
Version 1 (Dmitry Smekhov, 04/20/2013 07:41 pm) → Version 2/3 (Dmitry Smekhov, 05/13/2013 11:28 pm)
h1. AMBPEX5_SX50T_WISHBONE
FPGA project for AMBPEX5 board and WISHBONE bus
h2. Features
* PCI Express v1.1 x8
* pcie64_core_wishbone_m8 - PCI Express controller and WISHBONE master
* wb_conmax_top - wishbone cross switch - up to 16 device
* Block "TEST_GEN":http://src.ds-dev.ru/doc_en/wishbone/block_test_generate_en.htm - generate test sequence
* Block "TEST_CHECK":http://src.ds-dev.ru/doc_en/wishbone/block_test_check_en.htm - checked test sequence
h2. h1. Control registers
BAR0: http://src.ds-dev.ru/doc/core/ds_dma_core.htm (Now description in Russian)
BAR1: http://src.ds-dev.ru/doc_en/wishbone/wishbone_test_en.htm - for WISHBONE project
h2. Others
* [[AMBPEX5_SX50T_WISHBONE PlanAhead image|PlanAhead image]]
* [[WB_TEST]]