Ambpex5 sx50t wishbone
Version 3 (Dmitry Smekhov, 05/13/2013 11:45 pm)
1 | 1 | h1. AMBPEX5_SX50T_WISHBONE |
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3 | 1 | FPGA project for AMBPEX5 board and WISHBONE bus |
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4 | 1 | ||
5 | 1 | h2. Features |
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6 | 1 | ||
7 | 1 | * PCI Express v1.1 x8 |
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8 | 1 | * pcie64_core_wishbone_m8 - PCI Express controller and WISHBONE master |
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9 | 1 | * wb_conmax_top - wishbone cross switch - up to 16 device |
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10 | 1 | * Block "TEST_GEN":http://src.ds-dev.ru/doc_en/wishbone/block_test_generate_en.htm - generate test sequence |
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11 | 1 | * Block "TEST_CHECK":http://src.ds-dev.ru/doc_en/wishbone/block_test_check_en.htm - checked test sequence |
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13 | 1 | ||
14 | 2 | Dmitry Smekhov | h2. Control registers |
15 | 1 | ||
16 | 1 | BAR0: http://src.ds-dev.ru/doc/core/ds_dma_core.htm (Now description in Russian) |
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17 | 1 | BAR1: http://src.ds-dev.ru/doc_en/wishbone/wishbone_test_en.htm - for WISHBONE project |
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18 | 2 | Dmitry Smekhov | |
19 | 2 | Dmitry Smekhov | h2. Others |
20 | 2 | Dmitry Smekhov | |
21 | 2 | Dmitry Smekhov | * [[AMBPEX5_SX50T_WISHBONE PlanAhead image|PlanAhead image]] |
22 | 3 | Dmitry Smekhov | * [[WB_TEST_en|WB_TEST]] |