DS_DMA

07/01/2013

02:14 am Revision 32: Set 125 MHz for wishbone bus. Data transfered from TEST_GEN to computer without errors.

Dmitry Smekhov

02:09 am Development #48: AMBPEX5_SX50T_WISHBONE

I set 125 MHz to clk for WISHBONE bus.
Data transfered from TEST_GEN to computer without error.
Revision r32
Dmitry Smekhov

02:03 am Bug #57 (Resolved): missing data at 0x200

set clk for WISHBONE at 125 MHz Dmitry Smekhov

02:02 am Revision 31: correct wb_test

Dmitry Smekhov

06/23/2013

10:45 pm Development #48: AMBPEX5_SX50T_WISHBONE

Add register in the TEST_GEN block:
0x10 - STATUS
0x11 - BLOCK_WR
0x12 - sig 0xAAAAAAAAA - is temporary word
wb... Dmitry Smekhov

10:42 pm Bug #57 (Resolved): missing data at 0x200

wb_test program fix data error at adress 0x200 - one 64-bit word is missing Dmitry Smekhov

10:40 pm Bug #50 (Resolved): Changed DMA_REQUEST between TEST_CHECK and TEST_GENERATE

Dmitry Smekhov

10:39 pm Revision 30: data read from wb_gen with error

Dmitry Smekhov

10:23 pm Revision 29: Correct dmar, rst for wb_test; Add STATUS register.

Dmitry Smekhov

06/17/2013

01:50 am Bug #49 (Resolved): Computer crashes after the DMA stop

Function HwCompleteDmaTransfer has DmaDisable;
DmaDisable is function for ADM project. Dmitry Smekhov

06/12/2013

03:21 am Revision 28: add test_dio.cfg out_dio.cfg

Dmitry Smekhov

03:20 am Revision 27: update adm_test

Dmitry Smekhov

03:20 am Revision 26: update for adm_test

Dmitry Smekhov

12:54 am Output from adm_test program

Add English Wiki page: http://ds-dev.ru/projects/ds-dma/wiki/ADM_TEST_en
There is description of adm_test program an... Dmitry Smekhov